SoFunction
Updated on 2025-04-14

Tell everyone what is a dual channel?

First, set up dual-channel memory must be even. A 1G memory cannot be turned on dual-channel.
What is dual channel?
Dual-channel memory technology is actually a memory control and management technology. It relies on the chipset's memory controller to act, and in theory it can double the bandwidth provided by two memory sizes. It is not a new technology, it has long been applied to server and workstation systems. It has only reached the forefront of desktop motherboard technology to solve the increasingly difficult memory bandwidth bottleneck of desktop computers. A few years ago, Intel launched an i820 chipset that supports dual-channel memory transmission technology. It forms a golden partner with RDRAM memory. The outstanding performance it exerted makes it the biggest highlight of the market for a while, but the defect of excessive production costs has caused the popularity to be unpopular, and was eventually eliminated by the market. Since Intel has given up support for RDRAM, the current dual-channel memory technology of mainstream chipsets refers to dual-channel DDR memory technology. Intel is the Intel 865/875 series on the mainstream dual-channel memory platform, and NVIDIA Nforce2 series on the AMD.
Dual-channel memory technology is a low-cost and high-performance solution to solve the contradiction between CPU bus bandwidth and memory bandwidth. Now the CPU's FSB (front-end bus frequency) is getting higher and higher, and Intel Pentium 4 has much higher memory bandwidth requirements than AMD Athlon XP. The data transmission of Intel Pentium 4 processor and North Bridge chip uses QDR (Quad Data Rate, four data transmission) technology, and its FSB is 4 times that of external frequency. The FSB of Intel Pentium 4 is 400/533/800MHz, and the bus bandwidth is 3.2GB/sec, 4.2GB/sec and 6.4GB/sec, respectively. The memory bandwidths that DDR 266/DDR 333/DDR 400 can provide are 2.1GB/sec, 2.7GB/sec and 3.2GB/sec, respectively. In single-channel memory mode, DDR memory cannot provide the data bandwidth required by the CPU, thus becoming a performance bottleneck for the system. In dual-channel memory mode, the memory bandwidths that the dual-channel DDR 266/DDR 333/DDR 400 can provide are 4.2GB/sec, 5.4GB/sec and 6.4GB/sec respectively. Here you can see that the dual-channel DDR 400 memory can just meet the bandwidth requirements of the 800MHz FSB Pentium 4 processor. For the AMD Athlon XP platform, the data transmission technology of its processor and North Bridge chip adopts DDR (Double Data Rate, double data transmission) technology, the FSB is twice that of the external frequency, and its demand for memory bandwidth is far lower than that of Intel Pentium 4 platform. Its FSB is 266/333/400MHz, and its bus bandwidth is 2.1GB/sec, 2.7GB/sec and 3.2GB/sec, respectively. Using a single-channel DDR 266/DDR 333/DDR 400 can meet its bandwidth requirements. Therefore, using dual-channel DDR memory technology on the AMD K7 platform has little effect, and its performance improvement is not as obvious as that of Intel platform. The most obvious impact on performance is the integrated motherboard using an integrated display chip.
NVIDIA's nForce chipset was the first to expand the DDR memory interface to 128-bit chipset. Intel then used this dual-channel DDR memory technology on its E7500 server motherboard chipset. SiS and VIA also responded and actively developed this technology that can double the DDR memory bandwidth. However, for various reasons, it is not easy for many chipset manufacturers to achieve this dual-channel DDR (128 bit parallel memory interface). DDR SDRAM memory is completely different from RDRAM memory. The latter has high latency and is a serial transmission method. These characteristics determine that the difficulty and cost of designing a dual-channel RDRAM memory chipset is not too high. However, DDR SDRAM memory has its own limitations. It is characterized by low latency and adopts parallel transmission mode. The most important point is: when the DDR SDRAM operates at a frequency of more than 400MHz, its signal waveform often has distortion problems. These all bring considerable difficulty to design a chipset that supports dual-channel DDR memory systems, and the manufacturing cost of the chipset will also increase accordingly. These factors restrict the development of this memory control technology.
A normal single-channel memory system has a 64-bit memory controller, while a dual-channel memory system has two 64-bit memory controllers, with a 128-bit memory bit width in dual-channel mode, which theoretically doubles the memory bandwidth. Although the bandwidth provided by a dual 64-bit memory system is equivalent to that provided by a 128-bit memory system, the results achieved by the two are different. The dual-channel system includes two independent, complementary intelligent memory controllers. In theory, both memory controllers can operate simultaneously with zero delay between each other. For example, two memory controllers, one is A and the other is B. When controller B is preparing to make the next access to memory, controller A is reading/writing the main memory, and vice versa. This complementary "nature" of the two memory controllers can reduce the waiting time by 50%. The two memory controllers of dual-channel DDR are exactly the same in function, and the timing parameters of both controllers can be programmed separately. This flexibility allows users to use two DIMM memory sticks with different structures, capacity and speeds. At this time, the dual-channel DDR is simply adjusted to the lowest memory standard to achieve 128 bit bandwidth, allowing DIMM memory sticks with different density/wait time characteristics to operate reliably.
Desktop chipsets that support dual-channel DDR memory technology, Intel platform includes Intel's 865P/865G/865GV/865PE/875P and subsequent 915/925 series; VIA's PT880, ATI's Radeon 9100 IGP series, SIS SIIS 655, SIS 655FX and SIS 655TX; AMD platform includes VIA's KT880, NVIDIA's nForce2 Ultra 400, nForce2 IGP, nForce2 SPP and its future chips.